# Mismatch for Cells Connected in Parallel

In small modules the cells are in placed in series so parallel mismatch is not an issue. Modules are paralleled in large arrays so the mismatch usually applies at a module level rather than at a cell level. For cell or module in parrallel:

${V}_{1}={V}_{2}$ and ${I}_{T}={I}_{1}+{I}_{2}$

Cells connected in parallel. The voltage across the cell combination is always the same and the total current from the combination is the sum of the currents in the individual cells.

In the animation, cell 2 has a lower output current than cell 1. There is no real problem with mismatch as the currents accumulate, while the total current is always higher than the individual cell currents.

Voltage mismatch for two cells in parallel. The addition of cell 2 actually reduces Voc below that for good cell by itself.

An easy method of calculating the combined open circuit voltage (Voc) of mismatched cells in parallel. The curve for one of the cells is reflected in the voltage axis so that the intersection point (where I1+I2=0) is the Voc of the parallel configuration.